Energy-Aware Task Scheduling for MPSoC-based Embedded Systems

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Copyright: Abd Ishak, Suhaimi
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Abstract
Energy reduction is a critical factor in designing embedded systems. One technique to reduce the total energy consumption of the systems is Dynamic Voltage and Frequency Scaling (DVFS). However, different models require different approaches to maximize its effectiveness in reducing energy consumption. In this thesis, we investigate the following three problems: energy-aware scheduling for applications with precedence and deadline constraints on homogeneous Multiprocessor Systems-on-Chips (MPSoCs), energy-aware scheduling for applications with precedence and deadline constraints on heterogeneous Network-on-Chip (NoC)-based MPSoCs and energy-aware scheduling for streaming applications on NoC-based MPSoCs. Firstly, we propose an energy-aware task scheduling approach to the problem of reducing the energy consumption for homogeneous MPSoCs assuming continuous frequencies under two power models: total dynamic power and total power. This approach uses a novel priority scheme for task assignment and a convex Non-Linear Programming (NLP) to assign an optimal execution frequency to each task. Secondly, we propose two energy-aware task scheduling approaches for heterogeneous MPSoCs considering discrete frequency model. Initially, both approaches use a heuristic to assign each task to a processor, and compute an optimal frequency for each task and message under the continuous frequency model using convex NLP. Based on the frequencies of each task and message under the continuous frequency model, the first approach uses Integer Linear Programming (ILP) to select an optimal discrete frequency, and the second approach uses a polynomial-time heuristic to select a discrete frequency for each task and message. Thirdly, we propose an energy-aware task scheduling approach for streaming applications on homogeneous MPSoCs considering discrete frequencies under memory capacity constraints. This approach integrates task-level software pipelining with DVFS and features a novel retiming technique to transform intra-period dependencies into inter-period dependencies considering the task mapping to enhance parallelism. It uses NLP and ILP to assign discrete frequencies to all tasks and messages. An iterative approach is employed to resolve memory capacity violation. We have implemented our proposed approaches and compared them with state-of-the-art approaches. Results indicate that the proposed approaches perform significantly better, in terms of total energy consumption.
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Author(s)
Abd Ishak, Suhaimi
Supervisor(s)
Wu, Hui
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Publication Year
2018
Resource Type
Thesis
Degree Type
PhD Doctorate
UNSW Faculty
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