Abstract
Demands for high speed A/D converters are increasing rapidly in
telecommunications and digital signal processing. Many new designs have
been developed in the past ten years using new technologies and
architectures to meet requirements. Due to technology advances, CMOS
has become the dominant technology for A/D converters.
This thesis describes a new 4 bit folding A/D converter employing an active
resistor interpolating ladder and a new transition point detection scheme to
overcome some problems encountering in the conventional folding converter
design. This design can be expanded to 5-6 bit accuracy with little
modification to the transition point detection scheme. However, because of
an inherent property of the active resistor, the active resistor interpolating
ladder can only be used for a 2 bit fine ADC for folding A/D converters.
More research work needs to be done in order to use the active resistor
interpolating ladder in higher resolution designs.
The basic 4 bit folding A/D converter is implemented on chip with external
clock generators. Test results are presented for the experimental converter.