A 4 bit folding CMOS A/D converter.

Download files
Access & Terms of Use
open access
Copyright: Wang, Xinzhi
Altmetric
Abstract
Demands for high speed A/D converters are increasing rapidly in telecommunications and digital signal processing. Many new designs have been developed in the past ten years using new technologies and architectures to meet requirements. Due to technology advances, CMOS has become the dominant technology for A/D converters. This thesis describes a new 4 bit folding A/D converter employing an active resistor interpolating ladder and a new transition point detection scheme to overcome some problems encountering in the conventional folding converter design. This design can be expanded to 5-6 bit accuracy with little modification to the transition point detection scheme. However, because of an inherent property of the active resistor, the active resistor interpolating ladder can only be used for a 2 bit fine ADC for folding A/D converters. More research work needs to be done in order to use the active resistor interpolating ladder in higher resolution designs. The basic 4 bit folding A/D converter is implemented on chip with external clock generators. Test results are presented for the experimental converter.
Persistent link to this record
Link to Publisher Version
Link to Open Access Version
Additional Link
Author(s)
Wang, Xinzhi
Supervisor(s)
Rigby, Graham
Creator(s)
Editor(s)
Translator(s)
Curator(s)
Designer(s)
Arranger(s)
Composer(s)
Recordist(s)
Conference Proceedings Editor(s)
Other Contributor(s)
Corporate/Industry Contributor(s)
Publication Year
1998
Resource Type
Thesis
Degree Type
Masters Thesis
UNSW Faculty
Files
download Wang Xinzhi-011830786.pdf 12.04 MB Adobe Portable Document Format
Related dataset(s)