Thread level parallel processing for high performance and energy efficiency in application specific embedded systems

Abstract

Thread level parallelism of applications is commonly exploited using multi-thread processors. In such processors, hardware level thread switching control mechanisms are widely used due to the significant performance costs of software level approaches. This thesis investigates the hardware level multi-thread processor design and addresses three typical problems: thread switching overhead, scheduling for real time threads and the impact of multi-threaded execution on the processor cache performance. Thread switching consists of thread selection and execution switching that can involve a large delay, hence reduce the pipeline performance. We hide the long delay of thread selection by 1) performing thread selection in parallel to application execution and execution switching, and 2) merging the execution switching logic with the instruction fetch in a pipeline stage so that thread switching takes zero clock cycles. Common thread selection policies such as round robin do not guarantee making the deadline for real-time threads. We introduce an energy-aware priority-based scheduling algorithm that takes the advantage of high throughput of the multi-threaded execution to achieve high performance at low energy consumption. Caching is an essential part in modern processor systems to reduce expensive off-chip memory accesses. However, the interference of thread execution on memory access pattern can reduce its effectiveness. In this thesis, we address this issue with the focus on the applications that can be forked into independent threads, each of which is working on a different data set. We propose to synchronize the thread execution on the frequent loops for high instruction cache utilization and to relocate the thread data sets for data cache performance improvement. We have carried out extensive experiments for each of the proposed designs, which shows that our approaches are effective, improving both performance and energy efficiency.