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Abstract
Screen printed solar cell technology has dominated the photovoltaic (PV) industry for the past couple of decades due to its simplicity, robustness and cost-effectiveness. The draw-back of screen printed solar cells is its relatively low efficiency being 16.5% for mono-crystalline and 15.5% for multi-crystalline silicon solar cells [Mai06]. Much higher efficiency solar cells have been achieved in the laboratory. Unfortunately, the fabrication processes of the high efficiency laboratory solar cells are relatively complicated and excessively costly with the involvement of photolithography and high temperature thermal processes. Consequently, it is believed a new high efficiency solar cell structure on low priced wafer materials with low fabrication costs is required in order to achieve the overall cost reductions in solar cell production. The objective of this thesis work was therefore to realise such a cell design by applying the laser doping (LD) process as the high efficiency selective emitter technology onto well passivated, p-type multi-crystalline wafers together with a suitable self-aligned metallisation plating scheme to fabricate industrial viable high efficiency multi-crystalline solar cells, that is the laser doped p-type multi-crystalline silicon solar cell.
An important aspect of laser doping (LD) technology is to provide localised heavily doped regions without subjecting the entire wafer to high temperature processing. This feature makes LD highly suitable for fabricating multi-crystalline solar cells due to the fact that multi-crystalline wafer materials often degrade at high processing temperatures. Several challenges arose adapting the laser doping process to lower quality multi-crystalline materials, especially due to the presence of grain boundaries. The encountered challenges arising from the laser doping process on the multi-crystalline wafers were identified, examined and resolved. It was shown that modifying the laser processing parameters of the laser systems and incorporating a silicon oxy-nitride (SiOxNy) film by using plasma enhanced chemical vapour deposition (PECVD) can overcome the improper melting and doping of the grain boundaries during the LD process.
Just as importantly this thesis work demonstrated that a single layer PECVD SiOxNy and a double layer of PECVD SiOxNy/SiNx films are capable of minimising the laser induced defects arising from the thermal expansion mismatch between the silicon and PECVD SiNx. In addition, they also provide excellent surface and bulk passivation for textured, lightly phosphorus diffused, industrial grade, p-type Czochralski (CZ) and multi-crystalline wafers. Moreover, the reasons for the improvement in the post-firing effective minority carrier lifetime (τeff) either due to the surface or the bulk passivation quality were analysed. It was proven that PECVD SiOxNy and dual layer stacked SiOxNy/SiNx films are also suitable as front surface passivating anti-reflection coatings. N-type Float Zone (FZ) wafers were used to determine the surface recombination velocity (SRV) and the implied voltages under various PECVD SiOxNy film deposition conditions. An implied open circuit voltage (iVoc) of 743 mV was extracted from PECVD SiOxNy films suitable for anti-reflection coatings. These films possessed associated effective minority carrier lifetimes (τeff) of greater than 1.9 ms at a minority carrier injection level of 1 x 1015 cm-3, with a SRV value as low as 0.9 cms-1. Average post-firing iVoc of 668mV and 637mV on textured, diffused, commercial grade CZ and multi-crystalline wafers, respectively, were achieved with PECVD SiOxNy films with a refractive index of 2.05.
In this thesis, the background theory, and the processing sequence of effective self-aligned electroless and light induced plating (LIP) metallisation schemes are explained and presented. These metallisation schemes have been well known and quantified for many decades; nevertheless, applying these plating techniques onto the standard acid textured, phosphorus diffused, p-type multi-crystalline wafers with a SiNx coated surface can be relatively challenging. The origins of over-plating sites of nickel (Ni) and copper (Cu) on the acid textured, phosphorus diffused, SiNx coated p-type multi-crystalline wafer surfaces were examined. They were found to be more likely to over-plate underneath the wells and along the sharp edges of the acid textured multi-crystalline wafer surfaces. The three main causes of over-plating on acid textured multi-crystalline wafers with SiNx coated surfaces were analysed and verified: (1) the physical nature of PECVD SiNx deposition and the thicknesses of the SiNx film, (2) the surface n-type concentration density, and (3) the topology of the acid textured multi-crystalline wafer surfaces. In addition to increased shading losses, over-plating was also proven to cause shunting mechanisms or form Schottky contacts, which significantly degrades the overall electrical performance of the solar cell devices. Several methods of preventing over-plating problems were experimentally implemented and evaluated: (1) the variations of the plating conditions, (2) the modifications of the front surface dielectric coating, (3) the incorporation of the chemically grown oxide layer beneath the dielectric coating, and (4) the modifications of the topology of the acid textured multi-crystalline wafer surfaces. The outcomes of the experimental results from each of the individual problem solving techniques were analysed and presented in order. It was found that the development of the innovative acid rounding etch and alkali etch processes can be applied after the phosphorus diffusion and prior to the PECVD process to successfully eliminate over-plating problems on acid textured, phosphorus diffused, SiNx coated, p-type multi-crystalline silicon wafers. Finally, multi-crystalline wafers without excess plating on the surface were demonstrated.
Finally, having solved the associated challenges, novel industrially viable, high efficiency, laser doped selective emitter silicon solar cells on p-type multi-crystalline wafers were successfully developed, and the achievements of such a cell structure were thoroughly demonstrated. An average efficiency of 17.2% and an average fill factor (FF) of 78% on commercial grade p-type multi-crystalline wafers with nominal resistivity of 1 Ω.cm was reproducibly fabricated.