Publication:
Behavioural Language Compilation with Virtual Hardware Management

dc.contributor.author Diessel, Oliver en_US
dc.contributor.author Milne, George en_US
dc.date.accessioned 2021-11-25T13:27:14Z
dc.date.available 2021-11-25T13:27:14Z
dc.date.issued 2000 en_US
dc.description.abstract High-level, behavioural language specification is seen as a significant strategy for overcoming the complexity of designing useful and interesting reconfigurable computing applications. However, appropriate frameworks for the design of behaviourally specified systems are still being sought. We are investigating behavioural language and compiler design based on the Circal process algebra, which is a natural framework within which to describe the concurrent activity of reconfigurable logic circuits. In this paper we describe an FPGA interpreter that exploits the inherent concurrency, hierarchy, and modularity of Circal and its circuit realization to automatically manage hardware virtualization. The techniques employed by the interpreter may be used to overcome resource limitations and adapt circuits to changing application needs at run time. en_US
dc.identifier.isbn 354067899 en_US
dc.identifier.uri http://hdl.handle.net/1959.4/39672
dc.language English
dc.language.iso EN en_US
dc.publisher Springer en_US
dc.rights CC BY-NC-ND 3.0 en_US
dc.rights.uri https://creativecommons.org/licenses/by-nc-nd/3.0/au/ en_US
dc.source Legacy MARC en_US
dc.title Behavioural Language Compilation with Virtual Hardware Management en_US
dc.type Conference Paper en
dcterms.accessRights open access
dspace.entity.type Publication en_US
unsw.accessRights.uri https://purl.org/coar/access_right/c_abf2
unsw.description.publisherStatement The original publication is available at www.springerlink.com en_US
unsw.identifier.doiPublisher http://dx.doi.org/10.1007/3-540-44614-1_75 en_US
unsw.publisher.place Heidelberg, Germany en_US
unsw.relation.faculty Engineering
unsw.relation.ispartofconferenceLocation Carinthia, Austria en_US
unsw.relation.ispartofconferenceName FPL 2000 en_US
unsw.relation.ispartofconferenceProceedingsTitle Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing en_US
unsw.relation.ispartofconferenceYear 2000 en_US
unsw.relation.ispartofpagefrompageto 707-717 en_US
unsw.relation.originalPublicationAffiliation Diessel, Oliver, Computer Science & Engineering, Faculty of Engineering, UNSW en_US
unsw.relation.originalPublicationAffiliation Milne, George, University of South Australia en_US
unsw.relation.school School of Computer Science and Engineering *
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