Publication:
Exploiting statistical information for implementation of instruction scratchpad memory in embedded systems
Exploiting statistical information for implementation of instruction scratchpad memory in embedded systems
dc.contributor.author | Janapsatya, Andhi | en_US |
dc.contributor.author | Ignjatovic, Aleksandar | en_US |
dc.contributor.author | Parameswaran, Sri | en_US |
dc.date.accessioned | 2021-11-25T13:02:52Z | |
dc.date.available | 2021-11-25T13:02:52Z | |
dc.date.issued | 2006 | en_US |
dc.description.abstract | A method to both reduce energy and improve performance in a processor-based embedded system is described in this paper. Comprising of a scratchpad memory instead of an instruction cache, the target system dynamically (at runtime) copies into the scratchpad code segments that are determined to be beneficial (in terms of energy efficiency and/or speed) to execute from the scratchpad. We develop a heuristic algorithm to select such code segments based on a metric, called concomitance. Concomitance is derived from the temporal relationships of instructions. A hardware controller is designed and implemented for managing the scratchpad memory. Strategically placed custom instructions in the program inform the hardware controller when to copy instructions from the main memory to the scratchpad. A novel heuristic algorithm is implemented for determining locations within the program where to insert these custom instructions. For a set of realistic benchmarks, experimental results indicate the method uses 41.9% lower energy (on average) and improves performance by 40.0% (on average) when compared to a traditional cache system which is identical in size. | en_US |
dc.identifier.issn | 1063-8210 | en_US |
dc.identifier.uri | http://hdl.handle.net/1959.4/39020 | |
dc.language | English | |
dc.language.iso | EN | en_US |
dc.rights | CC BY-NC-ND 3.0 | en_US |
dc.rights.uri | https://creativecommons.org/licenses/by-nc-nd/3.0/au/ | en_US |
dc.source | Legacy MARC | en_US |
dc.title | Exploiting statistical information for implementation of instruction scratchpad memory in embedded systems | en_US |
dc.type | Journal Article | en |
dcterms.accessRights | metadata only access | |
dspace.entity.type | Publication | en_US |
unsw.accessRights.uri | http://purl.org/coar/access_right/c_14cb | |
unsw.description.publisherStatement | © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | en_US |
unsw.relation.faculty | Engineering | |
unsw.relation.ispartofissue | 8 | en_US |
unsw.relation.ispartofjournal | IEEE transactions on VLSI systems | en_US |
unsw.relation.ispartofpagefrompageto | 816-829 | en_US |
unsw.relation.ispartofvolume | 14 | en_US |
unsw.relation.originalPublicationAffiliation | Janapsatya, Andhi, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.originalPublicationAffiliation | Ignjatovic, Aleksandar, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.originalPublicationAffiliation | Parameswaran, Sri, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.school | School of Computer Science and Engineering | * |