Extensibility can be based on cross-address-space communication or on grafting application-specific modules into the operating system. For comparing both approaches, we need to explore the best achievalbe performance for both models. This paper reports the achieved performance of cross-address-space communication for the L4 microkernel on Intel Pentium, MIPS R4600 and DEC Alpha. The direct cost ranges from 81 cycles (Alpha) to 115 cycles (Pentium). Since only 2.5% of the L1 cache are required (Pentium) the average indirect costs are not expected to be much higher.