Publication:
Finding optimal L1 cache configuration for embedded systems
Finding optimal L1 cache configuration for embedded systems
dc.contributor.author | Janapsatya, Andhi | en_US |
dc.contributor.author | Ignjatovic, Aleksandar | en_US |
dc.contributor.author | Parameswaran, Sri | en_US |
dc.date.accessioned | 2021-11-25T13:00:41Z | |
dc.date.available | 2021-11-25T13:00:41Z | |
dc.date.issued | 2006 | en_US |
dc.description.abstract | Modern embedded system execute a single application or a class of applications repeatedly. A new emerging methodology of designing embedded system utilizes configurable processors where the cache size, associativity, and line size can be chosen by the designer. In this paper, a method is given to rapidly find the L1 cache miss rate of an application. An energy model and an execution time model are developed to find the best cache configuration for the given embedded application. Using benchmarks from Mediabench, we find that our method is on average 45 times faster to explore the design space, compared to Dinero IV while still having 100% accuracy. | en_US |
dc.description.uri | http://www.aspdac.com/aspdac2006/cfd/ | en_US |
dc.identifier.isbn | 0780394518 | en_US |
dc.identifier.uri | http://hdl.handle.net/1959.4/38930 | |
dc.language | English | |
dc.language.iso | EN | en_US |
dc.publisher | IEEE | en_US |
dc.rights | CC BY-NC-ND 3.0 | en_US |
dc.rights.uri | https://creativecommons.org/licenses/by-nc-nd/3.0/au/ | en_US |
dc.source | Legacy MARC | en_US |
dc.title | Finding optimal L1 cache configuration for embedded systems | en_US |
dc.type | Conference Paper | en |
dcterms.accessRights | open access | |
dspace.entity.type | Publication | en_US |
unsw.accessRights.uri | https://purl.org/coar/access_right/c_abf2 | |
unsw.description.publisherStatement | © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | en_US |
unsw.identifier.doi | https://doi.org/10.26190/unsworks/419 | |
unsw.publisher.place | USA | en_US |
unsw.relation.faculty | Engineering | |
unsw.relation.ispartofconferenceLocation | Yokohama, Japan | en_US |
unsw.relation.ispartofconferenceName | 11th Asia and South Pacific Design Automation Conference | en_US |
unsw.relation.ispartofconferenceProceedingsTitle | ASPDAC 2006, Proceedings | en_US |
unsw.relation.ispartofconferenceYear | 2006 | en_US |
unsw.relation.ispartofpagefrompageto | 796-801 | en_US |
unsw.relation.originalPublicationAffiliation | Janapsatya, Andhi, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.originalPublicationAffiliation | Ignjatovic, Aleksandar, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.originalPublicationAffiliation | Parameswaran, Sri, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.school | School of Computer Science and Engineering | * |
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