Publication:
Chip-based reconfigurable task management
Chip-based reconfigurable task management
dc.contributor.author | Brebner, Gordon | en_US |
dc.contributor.author | Diessel, Oliver | en_US |
dc.date.accessioned | 2021-11-25T13:27:12Z | |
dc.date.available | 2021-11-25T13:27:12Z | |
dc.date.issued | 2001 | en_US |
dc.description.abstract | Modularity is a key aspect of system design, particularly in the era of system-on-chip. Field-programmable logic (FPL), particularly with the rapid increase in programmable gate counts, is a natural medium to host run-time modularity, that is, a dynamically-varying ensemble of circuit modules. Prior research has presumed the use of an external processor to manage such an ensemble. In this paper, we consider on-chip management, implemented in the FPL itself, based upon a one-dimensional allocation model. We demonstrate an algorithm for on-chip identification of free FPL resource for modules, and an approach to on-chip rearrangement of modules. The latter includes a proposal for a realistic augmentation to existing FPGA reconfiguration architectures. The work represents a key demonstration of how FPL can be used as a first-order computational resource, rather than just as a slave to the microprocessor. | en_US |
dc.identifier.isbn | 3540424997 | en_US |
dc.identifier.uri | http://hdl.handle.net/1959.4/39669 | |
dc.language | English | |
dc.language.iso | EN | en_US |
dc.publisher | Springer-Verlag | en_US |
dc.rights | CC BY-NC-ND 3.0 | en_US |
dc.rights.uri | https://creativecommons.org/licenses/by-nc-nd/3.0/au/ | en_US |
dc.source | Legacy MARC | en_US |
dc.title | Chip-based reconfigurable task management | en_US |
dc.type | Conference Paper | en |
dcterms.accessRights | open access | |
dspace.entity.type | Publication | en_US |
unsw.accessRights.uri | https://purl.org/coar/access_right/c_abf2 | |
unsw.description.publisherStatement | The original publication is available at www.springerlink.com | en_US |
unsw.identifier.doiPublisher | http://dx.doi.org/10.1007/3-540-44687-7_19 | en_US |
unsw.publisher.place | Berlin, Germany | en_US |
unsw.relation.faculty | Engineering | |
unsw.relation.ispartofconferenceLocation | Belfast | en_US |
unsw.relation.ispartofconferenceName | 11th International Conference on Field-Programmable Logic and Applications | en_US |
unsw.relation.ispartofconferenceProceedingsTitle | Field-Programmable Logic and Applications, 11th International Conference, FPL 2001 Proceedings | en_US |
unsw.relation.ispartofconferenceYear | 2001 | en_US |
unsw.relation.ispartofpagefrompageto | 182-191 | en_US |
unsw.relation.originalPublicationAffiliation | Brebner, Gordon, University of Edinburgh | en_US |
unsw.relation.originalPublicationAffiliation | Diessel, Oliver, Computer Science & Engineering, Faculty of Engineering, UNSW | en_US |
unsw.relation.school | School of Computer Science and Engineering | * |
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