Publication:
On dynamic task scheduling for FPGA-based systems

dc.contributor.author Diessel, Oliver en_US
dc.contributor.author Elgindy, Hossam en_US
dc.date.accessioned 2021-11-25T13:27:15Z
dc.date.available 2021-11-25T13:27:15Z
dc.date.issued 2001 en_US
dc.description.abstract The development of FPGAs that can be programmed to implement custom circuits by modifying memory has inspired researchers to investigate how FPGAs can be used as a computational resource in systems designed for high performance applications. When such FPGA--based systems are composed of arrays of chips or chips that can be partially reconfigured, the programmable array space can be partitioned among several concurrently executing tasks. If partition sizes are adapted to the needs of tasks, then array resources become fragmented as tasks with varying requirements are processed. Tasks may end up waiting despite their being sufficient, albeit fragmented resources available. We examine the problem of repartitioning the system (rearranging a subset of the executing tasks) at run--time in order to allow waiting tasks to enter the system sooner. In this paper, we introduce the problems of identifying and scheduling feasible task rearrangements when tasks are moved by reloading. It is shown that both problems are NP--complete. We develop two very different heuristic approaches to finding and scheduling suitable rearrangements. The first method, known as Local Repacking, attempts to minimize the size of the subarray needing rearrangement. Candidate subarrays are repacked using known bin packing algorithms. Task movements are scheduled so as to minimize delays to their execution. The second approach, called Ordered Compaction, constrains the movements of tasks in order to efficiently identify and schedule feasible rearrangements. The heuristics are compared by time complexity and resulting system performance on simulated task sets. The results indicate that considerable scheduling advantages are to be gained for acceptable computational effort. However, the benefits may be jeopardized by delays to moving tasks when the average cost of reloading tasks becomes significant relative to task service periods. We indicate directions for future research to mitigate the cost of moving executing tasks. en_US
dc.identifier.issn 0129-0541 en_US
dc.identifier.uri http://hdl.handle.net/1959.4/39674
dc.language English
dc.language.iso EN en_US
dc.rights CC BY-NC-ND 3.0 en_US
dc.rights.uri https://creativecommons.org/licenses/by-nc-nd/3.0/au/ en_US
dc.source Legacy MARC en_US
dc.title On dynamic task scheduling for FPGA-based systems en_US
dc.type Journal Article en
dcterms.accessRights metadata only access
dspace.entity.type Publication en_US
unsw.accessRights.uri http://purl.org/coar/access_right/c_14cb
unsw.identifier.doiPublisher http://dx.doi.org/10.1142/S0129054101000709 en_US
unsw.relation.faculty Engineering
unsw.relation.ispartofjournal International Journal of Foundations of Computer Science en_US
unsw.relation.ispartofpagefrompageto 645-669 en_US
unsw.relation.ispartofvolume 12 en_US
unsw.relation.originalPublicationAffiliation Diessel, Oliver, Computer Science & Engineering, Faculty of Engineering, UNSW en_US
unsw.relation.originalPublicationAffiliation Elgindy, Hossam, Computer Science & Engineering, Faculty of Engineering, UNSW en_US
unsw.relation.school School of Computer Science and Engineering *
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