Engineering

Publication Search Results

Now showing 1 - 10 of 284
  • (2006) Koh, Shannon; Diessel, Oliver
    Conference Paper
    On-going improvements in the scaling of FPGA device sizes and time-to-market pressures encourage the use of module-oriented design flows [3], while economic factors favour the reuse of smaller devices for high performance computational tasks. One of the core problems in proposing dynamic modular reconfiguration approaches is supporting the differing communications needs of the sequence of modules configured over time [2]. Proposals to date have not focussed on communications issues. Moreover, they have advocated the use of specific protocols [4], or they cannot be readily implemented [1], or they suffer from high overheads [5], or rely upon deprecated features such as tri-state lines [7]. In contrast, we propose a methodology for the rapid deployment of a communications infrastructure that provides the wires required by dynamic modules and allows users to implement the protocols they want. Our aim is to support new tiled dynamically reconfigurable architectures such as Virtex-4, as well as mature device families.

  • (2006) Malik, Usama; Diessel, Oliver
    Conference Paper
    In line with Shannon's ideas, we define the entropy of FPGA reconfiguration to be the amount of information needed to configure a given circuit onto a given device. We propose using entropy as a gauge of the maximum configuration compression that can be achieved and determine the entropy of a set of 24 benchmark circuits for the Virtex device family. We demonstrate that simple off-the-shelf compression techniques such as Golomb encoding and hierarchical vector compression achieve compression results that are within 1-10% of the theoretical bound. We present an enhanced configuration memory system based on the hierarchical vector compression technique that accelerates reconfiguration in proportion to the amount of compression achieved. The proposed system demands little additional chip area and can be clocked at the same rate as the Virtex configuration clock.

  • (2006) Koh, Lih; Diessel, Oliver
    Conference Paper
    Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affect the performance of sequential code sequences. We propose dealing with these delays through a dynamic functional unit chaining approach. We study the performance benefits of a superscalar, out-of-order processor augmented with a two-by-two array of ALUs interconnected by a fast, partial bypass network. An online profiler guides the automatic configuration of the network to accelerate specific patterns of dependent instructions. A detailed study of benchmark simulations demonstrates these first steps towards mapping binaries to a small coarse-grained array at runtime can improve instruction throughput by over 18% and 25% when the microarchitecure includes bypass delays of one cycle and two cycles, respectively.



  • (2006) Timms, W.A.; Pells, S.E.; Cunningham, I.
    Report


  • (2006) Timms, W.A.; Aceworth, R.I.; Merrick, N.; Badenhop, A.M.
    Report

  • (2006) Altermatt, Pietro; Schenk, Andreas; Heiser, Gernot
    Journal Article
    A parametrization of the density of states (DOS) near the band edge of phosphorus-doped crystalline silicon is derived from photoluminescence and conductance measurements, using a recently developed theory of band gap narrowing. It is shown that the dopant band only `touches` the conduction band at the Mott (metal-insulator) transition and that it merges with the conduction band at considerably higher dopant densities. This resolves well-known contradictions between conclusions drawn from various measurement techniques. With the proposed DOS, incomplete ionization of phosphorus dopants is calculated and compared with measurements in the temperature range from 300 to 30 K. We conclude that (a) up to 25% of dopants are nonionized at room temperature near the Mott transition and (b) there exists no significant amount of incomplete ionization at dopant densities far above the Mott transition. In a forthcoming part II of this paper, equations of incomplete ionization will be derived that are suitable for implementation in device simulators. (c) 2006 American Institute of Physics.

  • (2006) Altermatt, Pietro; Schenk, Andreas; Schmithuesen, B; Heiser, Gernot
    Journal Article
    Building on Part I of this paper [Altermatt , J. Appl. Phys. 100, 113714 (2006)], the parametrization of the density of states and of incomplete ionization (ii) is extended to arsenic- and boron-doped crystalline silicon. The amount of ii is significantly larger in Si:As than in Si:P. Boron and phosphorus cause a similar amount of ii although the boron energy level has a distinctly different behavior as a function of dopant density than the phosphorus level. This is so because the boron ground state is fourfold degenerate, while the phosphorus ground state is twofold degenerate. Finally, equations of ii are derived that are suitable for implementation in device simulators. Simulations demonstrate that ii increases the current gain of bipolar transistors by up to 25% and that it decreases the open-circuit voltage of thin-film solar cells by up to 10 mV. The simulation model therefore improves the predictive capabilities of device modeling of p-n-junction devices.