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(1996) Altermatt, Peter; Heiser, Gernot; Dai, Ximing; Jurgens, J; Aberle, Armin; Robinson, Steven J.; Young, Timothy; Wenham, Stuart; Green, MartinJournal ArticleThe passivated emitter, rear locally diffused (PERL) cells, fabricated in our laboratory, reach an efficiency of 24.0%, the highest value for any silicon-based solar cell under terrestrial illumination. In an attempt to improve the rear surface passivation, which is usually obtained by a thermally grown oxide, we add a floating (i.e., noncontacted) p-n junction at the rear surface, resulting in the passivated emitter, rear floating p-n junction (PERF) cell design. Although these cells exhibit record 1-sun open-circuit voltages of up to 720 mV, their efficiency is degraded by nonlinearities ("shoulders") in the logarithmic I-V curves. In order to understand and manipulate such nonlinearities, this paper presents a detailed investigation of the internal operation of PERF cells by means of numerical modelling based on experimentally determined device parameters. From the model, we derive design rules for optimum cell performance and develop a generalized argumentation that is suitable to compare the passivation properties of different surface structures. For example, the oxidized rear surface of the PERL cell is treated as an electrostatically induced floating junction in this approach and analogies to the diffused floating p-n junction are drawn. Our simulations indicate that optimum rear surface passivation can be obtained in three different ways. (i) The floating junction of the PERF cell should be very lightly doped, resulting in a sheet resistivity of 5000 Omega/[D'Alembertian], and losses due to shunt leaking paths between the p-n junction and the rear metal contacts must be avoided. (ii) The rear surface of the PERL cell should be passivated by chemical vapor deposition of a silicon nitride film containing a larger positive interface charge density than exists in thermally grown oxides. (iii) An external gate can be added at the rear with low leakage currents and gate voltages of around 15 V.
(1998) Apte, S; Batley, G; Szymczak, Ronald; Rendell, P; Lee, Robert; Waite, DavidJournal Article
(1995) Waite, David; Szymczak, Ronald; Espey, Q; Furnas, MJournal Article