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Title
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Achieved IPC Performance (Still the Foundation for Efficiency)
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| Author(s) |
Liedtke, Jochen
Elphinstone, Kevin, Faculty of Engineering, UNSW
Schonberg, Sebastian
Hartig, Hermann
Heiser, Gernot, Computer Science & Engineering, Faculty of Engineering, UNSW
Islam, Nayeem
Jaeger, Trent
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| Resource Type |
Conference Paper |
| Conference Details |
6th Workshop on Hot Topics in Operating Systems (HotOS); Cape Cod, USA; May 1997
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| Publication Details |
6th Workshop on Hot Topics in Operating Systems (HotOS); IEEE Computer Society Press, USA, 1997; ISBN:0818678348; pp.28-31
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| Description/Abstract |
Extensibility can be based on cross-address-space communication or on grafting application-specific modules into the operating system. For comparing both approaches, we need to explore the best achievalbe performance for both models. This paper reports the achieved performance of cross-address-space communication for the L4 microkernel on Intel Pentium, MIPS R4600 and DEC Alpha. The direct cost ranges from 81 cycles (Alpha) to 115 cycles (Pentium). Since only 2.5% of the L1 cache are required (Pentium) the average indirect costs are not expected to be much higher. |
| Language |
EN |
| Rights |
Please click here to view the rights |
| Publisher Statement |
©1997 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
| Published Version |
http://dx.doi.org/10.1109/HOTOS.1997.595177 |
| Citation Link |
Please use this identifier to cite or link to this item: http://handle.unsw.edu.au/1959.4/39929 |
| Full Text | 
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| Total Attachment(s) | 1 |
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